With the development trend of ultra-large-scale integrated circuits (ICs), the feature size of ICs continues to decrease, and accordingly, the requirements for IC packaging technology also become higher. System in package (SIP) combines multiple active components, passive components, micro-electromechanical systems (MEMS), optical components, and other components with different functions into a single unit to form a system or a sub-system that is capable of providing multiple functions and allows heterogeneous IC integration. Compared with system on chip (SOC), SIP demonstrates relatively simple integration, shorter design cycle and market cycle, lower cost, and other advanced characteristics. SIP can be used to realize a more complex system, and thus it is a relatively common packaging technology.
Currently, in order to meet the goals for reducing the cost, improving the reliability, improving the speed, and increasing the density for IC packages, advanced packaging methods mainly adopt wafer-level system in package (WLSIP) and panel-level system in package (PLSIP). Compared to traditional SIP, WLSIP and PLSIP complete the packaging process on wafers or on panels, and thus demonstrate a number of advantages, such as greatly reducing the area of the package structure, reducing the manufacturing cost, optimizing the electrical performance, capable for batch production, etc. Therefore, WLSIP and PLSIP can significantly reduce the workload and the requirements on equipment.
However, the packaging efficiency and the yield and the reliability of the package structure for existing WLSIP and PLSIP may need to be further improved. The disclosed WLP methods using a photolithographic bonding material are directed to solve one or more problems set forth above and other problems in the art.